First work package finished. We are ready!

Mar 30, 2020

WP1 led by Thales Research and Technology (TRT) implied the definition of platform requirements for De-RISC.

Last week, De-RISC consortium successfully completed the first Work Package of the project: WP1. This set of tasks has as main goal defining the requirements of the De-RISC platform; in particular, it covers cross components requirements, as well as end user ones for space and aviation markets.

During 6 months, the full consortium has been setting the bases of the project through this first part following tasks such as the settlement of hardware and software requirements, the initial hardware platform setup, board requirements definition and the real-time and security requirements

As a result of this Work Package, De-RISC team has been able to identify and further develop the three parts in the Global Platform Architecture of the project: 

  • A Multi-Core System-on-Chip (SoC) architecture: Digital hardware design consisting of general-purpose microprocessors, peripherals, communication controllers and interconnect, based on radiation-tolerant RISC-V cores, to be implemented on FPGA.
  • De-RISC FPGA board: implementation of SoC architecture in programmable logic on a custom PCB.
  • Software architecture: software environment consisting of the XtratuM Hypervisor and the LithOS Real Time Operating System (RTOS).

Both deliverables of this Work Package (D1.1 and D1.2) will be available in the Results section of the website once the European Commission reviews them. 

The De-RISC consortium is now ready to continue working on other Work Packages after this first stage which has set the basis of the project. 

Let’s go team!