Learn more about the processor used in De-RISC Project: NOEL-V microprocessor by Cobham Gaisler

Feb 4, 2021

Cobham Gaisler, world leader provider of IP cores and supporting development tools for embedded computer systems, has developed a RISC-V based platform that merges peripherals (communication controllers) from current space systems together with RISC-V processor implementations.

The De-RISC project makes use of the NOEL-V microprocessor. The NOEL-V is a synthesizable VHDL model of a processor that implements the RISC-V architecture. The synthesizable model of the processor is referred to as an IP core and this IP core can be integrated in System-on-Chip (SoC) designs that target either implementation in Field Programmable Logic Arrays (FPGAs) or Application Specific Standard Products (ASSPs, can also be referred to as Application Specific Integrated Circuits, implementations). The NOEL-V processor is the first model in a CAES RISC-V line of processors that complements the LEON line of processors.

The NOEL-V processor core is highly configurable at implementation time. Users can select between microarchitectural choices such as if the processor should have a dual-issue or single-issue pipeline. The cache system is extensively configurable and features such as a memory management unit (MMU), Memory Protection Unit (MPU), and floating-point unit (FPU) are optional to implement. The NOEL-V implementation within the De-RISC project is a high-performance variant that implements the RISC-V RV64GCHN extensions. This is the most feature-complete variant of the NOEL-V. Other implementations, and variants of the De-RISC, architecture may opt to implement other configurations of the processor to have a more resource efficient implementation.

The NOEL-V processor is part of the GRLIB IP library that allows users to implement their own system-on-chip designs. GRLIB is available in a free open-source version named GRLIB-GPL. GRLIB-GPL is used by academia, hobbyists and companies worldwide in for teaching, play, and evaluation. While the SoC architecture that is being developed within De-RISC has not been released yet, the NOEL-V processor is immediately available.

Ready-made FPGA configurations exists for development boards such as the Xilinx KCU105, Microchip Polarfire, and Digilent Arty-A7. In addition to this, the GRLIB IP library and NOEL-V source code are available at