De-RISC team starts Work Packages 2 and 3, lead by Cobham Gaisler and fentISS
These past months De-RISC has been mainly involved in getting Work Package 1 done, which involved the definition of the platform requirements for the project. Now, and while we ultimate the last details of WP1, it is time to start the activities related to the hardware and software platform integration!
During the next months, De-RISC will work really hard in technical activities related to Work Packages 2 and 3. The first one will be in charge of the MPSoC setup and board design, as well as the verification of the functional and non-functional features of the MPSoC. This WP2 will involve tasks such as the system-on-chip setup, the functional system-on-chip verification, the non-functional system-on-chip features verification, the board design, the manufacture of the De-RISC FPGA board and the SoC design integration. These activities are expected to last for a full year with the collaboration of two of the partners: Cobham Gaisler and Barcelona SuperComputing Center.
On the other hand, Work Package 3 will also take off with the objective of porting XtratuM hypervisor to the RISC-V platform developed in the project and the associated toolset required to develop mixed criticality systems. FentISS and Thales Research and Technology will complete this mission performing three key tasks: the XtratuM hypervisor setup, the software toolchain integration, and the use case definition.
All this challenging work is expected to be ready at the end of next year and will require the full commitment of the consortium in such a specialized job. To do so, face-to-face progress meetings and monthly online sessions will be frequent during the next months in order to achieve full communication and coordination between partners of the consortium.
We are sure the De-RISC team will do its best to complete these two technical Work Packages successfully!
Stay tuned!